It also resets the counter if the signal rstn becomes 0 making this an active-low reset.
#Gtkwave tutorial code
The code essentially makes the counter count up if the up_down signal is 1, and down if its value is 0. For the time being, let us simply understand that the behavior of a counter is described. We will delve into more details of the code in the next article. The following code illustrates how a Verilog code looks like. Verilog helps us to focus on the behavior and leave the rest to be sorted out later. Power dissipation, timing and the ability to drive nets and other flops would also require a more thorough understanding of the physical characteristics of a transistor. Verilog creates a level of abstraction that helps hide away the details of its implementation and technology.įor example, the design of a D flip-flop would require the knowledge of how the transistors need to be arranged to achieve a positive-edge triggered FF and what the rise, fall and clk-Q times required to latch the value onto a flop among many other technology oriented details.
Today, Verilog is the most popular HDL used and practiced throughout the semiconductor industry. Verilog was developed to simplify the process and make the Hardware Description Language (HDL) more robust and flexible. VHDL was soon developed to enhance the design process by allowing engineers to describe functionality of the desired hardware and let automation tools convert that behavior into actual hardware elements like combinational gates and sequential logic. Bigger and complex circuits demanded more engineers, time and other resources and soon enough there was a need to have a better way of designing integrated circuits. In the early days of integrated circuits, engineers had to sit down and physically draw transistors and their connections on paper to design them such that it can be fabricated on silicon.
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